| 摘要 |
A frequency generator is provided to prevent generation of glitch in an output frequency by having a delay element and an inverter at an output terminal of a delay part. A delay unit(220) has m numbers of delay parts which are cascaded. The m is an integer above two. A selection unit(210) selects one of m delay parts. An output signal of the m-th delay part is inputted to be fed back to each delay part. An output signal of the delay part selected by the selection unit(210) is fed back to the selected delay part through the m-th delay part. The output signal of the selected delay part is reversed. |
