发明名称 Mitigating parasitic current that leaks to the control voltage node of a phase-locked loop
摘要 Parasitic current at the control voltage node of a phase-locked loop (PLL) can significantly reduce performance of the PLL. Off-state transistors in either the charge pump or the filter can cause this parasitic current. A method of canceling a parasitic current generated by the charge pump in the PLL is described. In this method, a leakage current associated with leaky circuits in the charge pump can be determined. An opposing current can be injected to the control voltage node. This opposing current is equal, but opposite, to the leakage current. A method of eliminating a parasitic current generated by the filter in the PLL is also described. In this method, for each programmable capacitor in an unused state, a unity gain buffer can charge the capacitor to the same potential as the control voltage node, thereby providing the same potential on both sides of the switch.
申请公布号 US7132865(B1) 申请公布日期 2006.11.07
申请号 US20040898423 申请日期 2004.07.23
申请人 ATHEROS COMMUNICATIONS, INC. 发明人 TERROVITIS MANOLIS;MEHTA SRENIK
分类号 H03L7/06 主分类号 H03L7/06
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