| 摘要 |
A configuration of a memory device is provided to improve efficiency of a system by integrating a data input/output pin and a command and address signal input/output pin. Pins(DCA,219) of a first group receive a command and an address, or data. Pins(QCA,223) of a second group output a command and an address, or data. When the pins of the first group receive data, the pins of the second group receive the command and address. When the pins of the second group output data, the pins of the first group receive the command and address.
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