发明名称 |
Semiconductor integrated circuit including operation test circuit and operation test method thereof |
摘要 |
A semiconductor integrated circuit disclosed herein comprising: a phase control circuit which shifts a phase of a first clock signal based on a phase control signal and outputs a second clock signal; a first flip-flop to which one of the first clock signal and the second clock signal is inputted as a first operation clock signal, and which outputs evaluation data; a circuit under test which performs a predetermined process based on the evaluation data and outputs a result of the process as output data; and a second flip-flop to which the other of the first clock signal and the second clock signal is inputted as a second operation clock signal and the output data is inputted, and which outputs the output data inputted from the circuit under test.
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申请公布号 |
US7134060(B2) |
申请公布日期 |
2006.11.07 |
申请号 |
US20040752504 |
申请日期 |
2004.01.08 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
TANAKA YOSHIYUKI;OJIMA YOSHINARI |
分类号 |
G01R31/28;G01R31/317;G01R31/3183;G06F11/00;H01L21/822;H01L27/04 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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