METHOD FOR FABRICATING SEMICONDUCTOR DEVICE

摘要

A method for manufacturing a semiconductor device is provided to reduce a parasitic capacitance by arranging properly a dummy active pattern between a real active region and a PMOS transistor. An isolation region is defined on a substrate. A dummy active region(C) and a real active region are defined on the substrate. An STI layer is formed within the isolation region. An ion implantation is performed on the resultant structure except for the dummy active region. The dummy active region is spaced apart enough from the real active region.