发明名称 |
Integrated dynamic RAM unit for memory plane, has transistor with electric charge storage, source and drain zones, where electrical junction between source and storage zones is smaller than junction between drain and storage zones |
摘要 |
<p>The memory unit has a metal oxide semiconductor transistor (10) comprising a source zone (1) and a drain zone (2) spaced from each other. An electric charge storage zone (5) extends between the source and the drain zones along a direction (D1) parallel to a surface of a substrate. The zones are separated electrically by a lower conducive part of the substrate. An electrical junction (J1) between the zones (1, 5) is smaller than an electrical junction (J2) between the zones (2, 5). Independent claims are also included for the following: (1) a method for erasing a bit stored in an integrated dynamic RAM unit (2) a method for erasing a word stored in a memory plane.</p> |
申请公布号 |
FR2885261(A1) |
申请公布日期 |
2006.11.03 |
申请号 |
FR20050004317 |
申请日期 |
2005.04.28 |
申请人 |
STMICROELECTRONICS SA SOCIETE ANONYME |
发明人 |
MALINGE PIERRE |
分类号 |
H01L27/108;G11C11/401;H01L21/8242 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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