发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
<p>A field effect transistor for nonvolatile memory holding use and a field effect transistor for logical operation use are manufactured in a same structure on a same semiconductor substrate without separately providing manufacturing processes for the field effect transistors for the two uses. Both of a memory circuit and a logic circuit of a semiconductor integrated circuit are composed of n and p channel field effect transistors including a memory holding material in a gate insulating structure (12). A logical operation status, a memory writing status and a nonvolatile memory holding status are electrically switched by controlling the level and applying timing of a voltage to be applied between a gate and a substrate region of the n and p channel field effect transistors including the memory holding material in the gate insulating structure.</p> |
申请公布号 |
WO2006115075(A1) |
申请公布日期 |
2006.11.02 |
申请号 |
WO2006JP307850 |
申请日期 |
2006.04.13 |
申请人 |
NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCEAND TECHNOLOGY;TAKAHASHI, MITSUE;SAKAI, SHIGEKI |
发明人 |
TAKAHASHI, MITSUE;SAKAI, SHIGEKI |
分类号 |
H01L21/8246;G11C11/22;H01L27/10;H01L27/105;H03K19/0944;H03K19/20 |
主分类号 |
H01L21/8246 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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