A MOSFET HAVING ISOLATION STRUCTURE FOR SINGLE CHIP INTEGRATION AND METHODS OF MANUFACTURING THE SAME

摘要

A metal oxide semiconductor (MOS) field effect transistor device having isolation structure for single chip integration, wherein PMOS field effect transistor comprises: a first N-type well formed in the P-type substrate, a first P-type area formed in the first N-type well, a P+-type drain region formed in the first P-type area, a P+-type source region and a N+-type contact region form a first source electrode, the first N-type well surrounds P+-type source region and N+-type contact region of PMOSFET; NMOS field effect transistor comprises: a second N-type well formed in the P-type substrate, a second P-type area formed in the second N-type well, a N+-type drain region formed in the second N-type well, a N+-type source region and a P+-type contact region form a second source electrode, the second P-type area surrounds N+-type source region and P+-type contact region of NMOS field effect transistor, a plurality of separate P-type area are formed in P-type substrate to provide an isolation between the transistors.