| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit apparatus and its write method in which write voltage can be reduced and which is profitable for miniaturization. <P>SOLUTION: The semiconductor integrated circuit apparatus is provided with a memory cell array 13 provided in a matrix state and provided with a plurality of memory cell transistors having a floating gate and a control gate, respectively, a first high breakdown voltage transistor TR3 which is arranged at a periphery of the memory cell array and in which one end of a current path is connected to a selection control gate, and a second high voltage circuit region 12 provided with a second high breakdown strength system transistor TR2 in which one end of the current path is connected to a first non-selection control gate being adjacent to the selection control gate, intermediate voltage of an extent at which the current path of the memory cell transistor is conducted to the first non-selection control gate is applied, and voltage applied to the selection control gate is raised to write voltage by a first capacity coupling generated between the selection control gate and a non-selection gate. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
