发明名称 CONDUCTOR APPARATUS AND ITS TESTING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor apparatus and its testing method for testing a circuit block (IP) at a high speed, using few external terminals. SOLUTION: The semiconductor apparatus and its test method has built-in memories 15a and 15b for storing a test pattern 14 at a first test operation mode; MUX 12c and 12d for selecting the test pattern 14 output from the built-in memories 15a and 15b and to supply it to the circuit block 11 as a test input at a second test operation mode; and MUX 12a and 12b for selecting a separate test pattern 14 from the external terminals, and to supply it to the circuit block 11 as a separate test input at the second test operation mode. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006303326(A) 申请公布日期 2006.11.02
申请号 JP20050125529 申请日期 2005.04.22
申请人 TOSHIBA CORP 发明人 NOZUYAMA YASUYUKI
分类号 H01L21/822;G01R31/3183;H01L27/04 主分类号 H01L21/822
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