发明名称 SELF-REFRESH CIRCUIT WITH OPTIMIZED POWER CONSUMPTION
摘要 A random access memory device has a memory array, and a refresh rate generator circuit. The memory array has a plurality of memory cells that are configured to hold a charge. The memory array has an active mode and a standby mode. The refresh rate generator circuit is coupled to the memory array and is configured to generate a refresh signal having a rate. The refresh signal is used to periodically refresh the memory cells. The memory device detects when the memory array changes from its standby mode to its active mode and then increases the rate of the refresh signal when the memory array changes from its standby mode to its active mode.
申请公布号 US2006245288(A1) 申请公布日期 2006.11.02
申请号 US20050117855 申请日期 2005.04.29
申请人 HOKENMAIER WOLFGANG 发明人 HOKENMAIER WOLFGANG
分类号 G11C7/00 主分类号 G11C7/00
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