发明名称 LINE-TIMING IN PACKET-BASED NETWORKS
摘要 <p>A line-timing in packet-based networks is provided to make a node receive one or more incoming packet-based signals from one or more different nodes of a network and restore clock signals from each of the packet-based signal. A receiver(130) receives an incoming packet-based signal from a different node(102) of a network and recovers a clock signal from the incoming packet-based signal. A clock selector(134) selects one of clock signals as a reference clock signal. A transmitter(146) generates an outgoing packet-based signal based on the reference clock signal and transmits it to the different node(102) of the network.</p>
申请公布号 KR20060113493(A) 申请公布日期 2006.11.02
申请号 KR20060038091 申请日期 2006.04.27
申请人 AGERE SYSTEMS INC. 发明人 BEDROSIAN P. STEPHAN
分类号 H04L12/56;H04B7/26;H04L12/28 主分类号 H04L12/56
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