发明名称 Fast fourier transform twiddle multiplication
摘要 An FFT engine implementing a cycle count method of applying twiddle multiplications in multi-stages. When implementing a multistage FFT, the intermediate values need to be multiplied by various twiddle factors. The FFT engine utilizes a minimal number of multipliers to perform the twiddle multiplications in an efficient pipeline. Optimizing a number of complex multipliers based on an FFT radix and a number of values in each row of memory allows the FFT function to be performed using a reasonable amount of area and in a minimal number of cycles. Strategic ordering and grouping of the values allows the FFT operation to be performed in a fewer number of cycles.
申请公布号 US2006248135(A1) 申请公布日期 2006.11.02
申请号 US20060373433 申请日期 2006.03.10
申请人 COUSINEAU KEVIN S;KRISHNAMOORTHI RAGHURAMAN 发明人 COUSINEAU KEVIN S.;KRISHNAMOORTHI RAGHURAMAN
分类号 G06F17/14 主分类号 G06F17/14
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