发明名称 CIRCUIT FOR ANALYZING KEY SIGNAL
摘要 A key recognizing circuit is provided to minimize the number of communication ports. Each of 2^n number of binary numbers having the n number of digits corresponds to each key of a key input unit. The n number of signal lines is electrically connected with each key. Each of the n number of signal lines has electrically low and high values according to values 0 and 1 of the bits of the first column, the second column, the third column, and the nth column of the binary numbers corresponding to each corresponding key.
申请公布号 KR20060113084(A) 申请公布日期 2006.11.02
申请号 KR20050035950 申请日期 2005.04.29
申请人 PANTECH & CURITEL COMMUNICATIONS, INC. 发明人 JUNG, CHANG SHIK
分类号 H04M1/23;H04B1/40 主分类号 H04M1/23
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