REDUCED POWER CONSUMPTION DESIGN METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT

摘要

PROBLEM TO BE SOLVED: To achieve a reduced power consumption in a logic design and a layout design. SOLUTION: A group of logic cells where a signal waveform is operated in a small amplitude (hereinafter referred to as a small amplitude-operating cell) is added into a logic cell library which is an aggregate of groups of logic cells where an ordinary signal waveform used in a semiconductor circuit design is operated in a full amplitude (hereinafter referred to as a full amplitude operating cell) to form one logic cell library, thereby preparing the logic design while mixing the full amplitude operating cells and the small amplitude operating cells using the logic cell library. COPYRIGHT: (C)2007,JPO&INPIT