发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>A power shutdown area is correctly provided. A cell region whereupon a plurality of core cells are arranged, and a power supply switch arranged corresponding to each cell region is provided. A plurality of power shutdown areas are formed by a unit of the core cell, and power shutdown is performed for each power shutdown area by the power supply switch corresponding to each power shutdown area. Thus, the power shutdown area can be finely set by the unit of the core cell, and the power shutdown area is correctly provided. The current consumption during the standby time can be reduced by the correction of the power shutdown are a.</p>
申请公布号 WO2006114875(A1) 申请公布日期 2006.11.02
申请号 WO2005JP07596 申请日期 2005.04.21
申请人 RENESAS TECHNOLOGY CORP.;SASAKI, TOSHIO;YASU, YOSHIHIKO;MORI, RYO;ISHIBASHI, KOICHIRO;KANNO, YUSUKE 发明人 SASAKI, TOSHIO;YASU, YOSHIHIKO;MORI, RYO;ISHIBASHI, KOICHIRO;KANNO, YUSUKE
分类号 H01L21/822;H01L21/82;H01L27/04;H03K19/00;H03K19/003 主分类号 H01L21/822
代理机构 代理人
主权项
地址
您可能感兴趣的专利