发明名称 METHOD FOR FORMING A METAL LINE IN SEMICONDUCTOR DEVICE
摘要 A method for forming a metal interconnection in a semiconductor device is provided to stably form a metal interconnection made of a low dielectric layer regardless of ashing damage in a photoresist ashing process, by burying a metal layer in a via hole and/or a trench so that a metal interconnection is formed, by eliminating a low dielectric layer damaged by selective ashing and by re-depositing a new low dielectric layer in a portion from which the low dielectric layer is removed. An etch stop layer(111) and a first insulation layer are sequentially deposited on a substrate(110). The first insulation layer is etched by a photolithography process to form a hole. A metal interconnection is formed to fill the hole. The first insulation layer is selectively wet-etched by using a DHF(diluted HF) solution to protrude the metal interconnection. A second insulation layer is formed in a portion from which the first insulation layer is eliminated.
申请公布号 KR20060113294(A) 申请公布日期 2006.11.02
申请号 KR20050036586 申请日期 2005.04.30
申请人 MAGNACHIP SEMICONDUCTOR, LTD. 发明人 CHO, IHL HYUN
分类号 H01L21/3205 主分类号 H01L21/3205
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