发明名称 Method for forming a multi-layer low-K dual damascene
摘要 A damascene structure and method for forming the same in a multi-density dielectric insulating layer the method including providing a substrate; forming at least a first layer comprising silicon oxide according to a first process having a first density; forming at least a second layer comprising silicon oxide according to a second process over the first layer having a second density less than the first density; etching a damascene opening through a thickness portion of the at least a first and the at least a second layer; and, filling the damascene opening to form a metal filled damascene.
申请公布号 US7129164(B2) 申请公布日期 2006.10.31
申请号 US20040968199 申请日期 2004.10.18
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 CHANG HUI LIN;LU YUNG CHENG;LI LI PING;BAO TIEN I;LIN CHIH HSIEN
分类号 H01L21/4763 主分类号 H01L21/4763
代理机构 代理人
主权项
地址