发明名称 A MECHANISM FOR INSTRUCTION SET BASED THREAD EXECUTION ON A PLURALITY OF INSTRUCTION SEQUENCERS
摘要 In an embodiment, a method is provided. The method includes managing user-level threads on a first instruction sequencer in response to executing user-level instructions on a second instruction sequencer that is under control of an application level program. A first user-level thread is run on the second instruction sequencer and contains one or more user level instructions. A first user level instruction has at least 1) a field that makes reference to one or more instruction sequencers or 2) implicitly references with a pointer to code that specifically addresses one or more instruction sequencers when the code is executed.
申请公布号 WO2006074024(A3) 申请公布日期 2006.10.26
申请号 WO2005US47328 申请日期 2005.12.28
申请人 INTEL CORPORATION;WANG, HONG;SHEN, JOHN;GROCHOWSKI, ED;HELD, JAMES, PAUL;BIGBEE, BRYANT;KAUSHIK, SHIVNANDAN, D.;CHINYA, GAUTHAM;ZOU, XIANG;HAMMARLUND, PER;TIEN, XINMIN;AGGARWAL, ANIL;RODGERS, SCOTT, DION;PATEL, BAIJU, V.;HANKINS, RICHARD 发明人 WANG, HONG;SHEN, JOHN;GROCHOWSKI, ED;HELD, JAMES, PAUL;BIGBEE, BRYANT;KAUSHIK, SHIVNANDAN, D.;CHINYA, GAUTHAM;ZOU, XIANG;HAMMARLUND, PER;TIEN, XINMIN;AGGARWAL, ANIL;RODGERS, SCOTT, DION;PATEL, BAIJU, V.;HANKINS, RICHARD
分类号 G06F9/48 主分类号 G06F9/48
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