发明名称 |
Method for Manufacturing Semiconductor Device |
摘要 |
A gate electrode is formed of a laminate structure comprising a plurality of conductive layers such that the width along the channel of a lower first conductive layer is larger than that of an upper second conductive layer The gate electrode is used as a mask during ion doping for forming an LDD. A mask pattern for forming the gate electrode is processed into an optimum shape in combination with dry etching so that the LDD overlapping with the gate electrode(Lov) is 1 mum or more, and preferably, 1.5 mum or more.
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申请公布号 |
US2006240674(A1) |
申请公布日期 |
2006.10.26 |
申请号 |
US20060456361 |
申请日期 |
2006.07.10 |
申请人 |
SEMICONDUCTOR ENERGY LABORATORY CO., LTD. |
发明人 |
MONOE SHIGEHARU |
分类号 |
H01L21/302;H01L21/3065;H01L21/336;H01L21/461;H01L21/768;H01L29/41;H01L29/423;H01L29/49;H01L29/786 |
主分类号 |
H01L21/302 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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