发明名称 Method for manufacturing semiconductor device capable of improving breakdown voltage characteristics
摘要 In a method for manufacturing a MOS transistor, a MOS transistor isolation layer is formed within a semiconductor substrate to surround an area for forming the MOS transistor in the semiconductor substrate. Then, first impurities are introduced into the area of the semiconductor substrate to adjust a threshold voltage of the MOS transistor. Also, second impurities are introduced into only a part of a periphery of the above-mentioned area adjacent to the MOS transistor isolation layer above which a gate electrode of the MOS transistor will be formed.
申请公布号 US2006240627(A1) 申请公布日期 2006.10.26
申请号 US20060406294 申请日期 2006.04.19
申请人 NEC ELECTRONICS CORPORATION 发明人 INOUE TOMOHARU
分类号 H01L21/336 主分类号 H01L21/336
代理机构 代理人
主权项
地址