OVERLAY MARK OF A SEMICONDUCTOR DEVICE AND MEHTOD OF MANUFACTURING THE SAME

摘要

An overlay mark of a semiconductor device and a method for manufacturing the same are provided to measure an interlayer overlay and to align a semiconductor substrate using a main-scale and a vernier. An overlay mark of a semiconductor device includes a main-scale and a vernier. The mother scale(120) includes two vertical patterns and two horizontal patterns. Each pattern having a grid shape includes at least two bar patterns. The vernier(140) is formed on a film(130) of the main-scale in order to have a same shape and a direction of the main-scale.