| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a DRAM laminated package which makes it possible to make tests and/or relief of high speed DRAMs in a semiconductor tester, and a DIMM and a semiconductor manufacturing method. <P>SOLUTION: The DRAM laminated package has an interface chip 2 between the stacked DRAMs 4 and the terminals connected to a tester 1 to input or output the address, command, and data at least, and mounts the DRAMs and the interface chip in a package. The interface chip 2 has an algorithmic pattern creating section 10 to create a test pattern to test the DRAMs, circuits 20, 21 to apply the created test pattern to the DRAMs, and a test circuit 8 having a comparator 18 to compare the response signals from the DRAMs and the expected values. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
