发明名称 |
NONVOLATILE SEMICONDUCTOR MEMORY APPARATUS |
摘要 |
<p><P>PROBLEM TO BE SOLVED: To enable reading out multi-level data at high speed. <P>SOLUTION: A memory cell MC stores data of a plurality of bits. A first sense amplifier G3 compares a current outputted from the memory cell MC with a first reference current outputted from a reference current generating circuit G5. A latch circuit G4 holds an output signal of the first sense amplifier G3. The reference current generating circuit G5 outputs a second reference current for reading out second bit data from the memory cell MC in accordance with the first bit data outputted from the latch circuit G4. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
申请公布号 |
JP2006294145(A) |
申请公布日期 |
2006.10.26 |
申请号 |
JP20050114751 |
申请日期 |
2005.04.12 |
申请人 |
TOSHIBA INFORMATION SYSTEMS (JAPAN) CORP;TOSHIBA CORP |
发明人 |
YOKOYAMA HIROYUKI;HONDA YASUHIKO |
分类号 |
G11C16/02;G11C16/04;G11C16/06 |
主分类号 |
G11C16/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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