发明名称 SIGNAL MULTIPLEXER/DEMULTIPLEXER AND SIGNAL MULTIPLEXING/DEMULTIPLEXING METHOD USED FOR SAME
摘要 PROBLEM TO BE SOLVED: To provide a signal multiplexer/demultiplexer capable of minimizing signal discard without the need for increasing the circuit scale. SOLUTION: PMAs 11, 15 carry out recovery of a clock from a GbE [Gigabit Ethernet (R)] signal received from ports 1, 2, serial/parallel conversion of the signal, and detection of input interruption. 8B/10B synchronization sections 12, 16 synchronize 8B/10B codes on the basis of signals in 10 bits subjected to parallel processing by the PMAs 11, 15, respectively. Pointer insert sections 13, 17 insert a pointer indicating a port number into idle codes of the 8B/10B codes. Fixed pattern generating sections 19, 20 generate dummy signals inserted at signal interruption. Selection sections 14, 18 select either of real signals and the dummy signals. A multiplexer section 21 applies bit multiplex to the signals of the port 1 and the signals of the port 2. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006295264(A) 申请公布日期 2006.10.26
申请号 JP20050109307 申请日期 2005.04.06
申请人 NEC CORP 发明人 TANAKA HIROAKI
分类号 H04J3/00;H04L12/46;H04L25/49 主分类号 H04J3/00
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