| 摘要 |
A cascade system restraining duty cycle offsets is provided to invert a processing signal in a selected circuit unit in a case of generating duty cycle offsets. In a cascade system(30) restraining duty cycle offsets, a plurality of circuit units(31,32,33,34,35) is connected in series, wherein each of the plurality of circuit units receives a signal from the prior circuit unit and includes a processing signal having a processing duty cycle, and the duty cycle offsets exist between the processing duty cycle and an input duty cycle by at least one circuit unit. At least one circuit unit is selected by a predetermined gap and the processing signal of the circuit unit is inverted for compensating the duty cycle offsets and restraining the processing signal within a predetermined region.
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