发明名称
摘要 A method of manufacturing a multilayer printed circuit board, which ensures connections between vias. First, insulating sheets are attached to respective end faces of inner via holes formed through an insulating layer, and then a new insulating layer is formed on the insulating layer. Then, a circuit pattern is formed on the new insulating layer, and then each land formed on the new insulating layer at a location opposed to a corresponding one of the inner via holes is perforated by using a laser beam to have a hole continuous with an inner hole of the corresponding inner via hole. Thereafter, plating is carried out to form a build-up via for connecting between each of the lands and the corresponding inner via hole. The same process is repeatedly carried out whenever a new insulating layer is provided on the existing layers.
申请公布号 JP3838800(B2) 申请公布日期 2006.10.25
申请号 JP19980355267 申请日期 1998.12.15
申请人 发明人
分类号 H05K3/46;H05K1/11;H05K3/00;H05K3/22;H05K3/34;H05K3/42 主分类号 H05K3/46
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