发明名称 |
Programmable logic device having an embedded differential clock tree |
摘要 |
A clock distribution network having: a backbone clock signal line configured to provide a differential clock signal; multiple branches coupled to the backbone clock signal line for distributing the differential clock signal to multiple programmable function elements; a first leaf node coupled to a first branch, where the first leaf node is configured to provide the differential clock signal to a first programmable function element; and a second leaf node coupled to a second branch, where the second leaf node is configured to provide a single ended clock signal derived from the differential clock signal to a second programmable function element.
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申请公布号 |
US7126406(B2) |
申请公布日期 |
2006.10.24 |
申请号 |
US20040837009 |
申请日期 |
2004.04.30 |
申请人 |
XILINX, INC. |
发明人 |
VADI VASISHT MANTRA;YOUNG STEVEN P.;GHIA ATUL V.;BEKELE ADEBABAY M.;MENON SURESH M. |
分类号 |
G06F1/04;G06F1/10;H03F3/45;H03K3/00;H03K5/15;H03K19/177 |
主分类号 |
G06F1/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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