发明名称 |
SEMICONDUCTOR DEVICES HAVING DUAL CAPPING LAYER PATTERNS AND METHODS OF MANUFACTURING THE SAME |
摘要 |
Some embodiments provide a semiconductor substrate having a cell array region and a peripheral circuit region. A plurality of word line patterns are placed in the cell array region, each of which include a word line and a word line capping layer pattern stacked thereon. At least one gate pattern including a gate electrode and a gate capping layer pattern is formed in the peripheral circuit region, the gate capping layer pattern and the word line capping layer pattern having different etching selectivity ratios. A pad interlayer insulating layer and a bit line interlayer insulating layer having approximately the same etching selectivity ratio as the gate capping layer pattern are sequentially formed over a surface of the semiconductor substrate having the gate spacers. |
申请公布号 |
US2006231903(A1) |
申请公布日期 |
2006.10.19 |
申请号 |
US20060422591 |
申请日期 |
2006.06.06 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
LEE HOO-OUK;BAN HYO-DONG |
分类号 |
H01L29/76;H01L21/8239;H01L27/105;H01L29/94;H01L31/00 |
主分类号 |
H01L29/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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