| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory apparatus in which deterioration of write recovery time can be suppressed without depending on a start address of burst operation. SOLUTION: Selection data holding circuits 19-1, 19-2, 19-3, 19-4 hold data bits at the time of initial write-in out of a plurality of write-in for memory cells (not shown) for data bits C(1), C(2), C(3), C(4) of the number of bits constituting an ECC code at the time of burst write and each parity bit P. And when an address of data bits constituting the ECC code generated initially is specified at the time of last write-in for the memory cells at the time of burst write, a parity bit generated initially is updated based on write data written lastly and held data bits. COPYRIGHT: (C)2007,JPO&INPIT
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