发明名称 MANUFACTURING METHOD OF WIRING SUBSTRATE UTILIZING ELECTROLYTIC PLATING
摘要 PROBLEM TO BE SOLVED: To contrive the increase of density of arrangement of a circuit pattern by preventing the reflection or noise of a signal due to unnecessary parts of the circuit pattern, and to improve electric characteristics upon forming the circuit pattern on a substrate through electrolytic plating. SOLUTION: A first non-electrolytic plating layer and a first plate resist formed on the first non-electrolytic plating layer are formed on the insulating substrate with metallic foil. Electric power is supplied to the non-electrolytic plating layer to form a first electrolytic plating layer on the first non-electrolytic plating layer in the opening of the resist. The first plating resist is removed, the exposed first non-electrolytic plating layer and the metallic foil are removed to expose the insulating substrate, a second non-electrolytic plating layer is formed on the exposed part of substrate and the circuit pattern, and a second plating resist is formed thereon. The second non-electrolytic plating layer in the opening of resist is removed, an electric power is supplied to the second non-electrolytic plating layer below the second plating resist to form the second electrolytic plating layer on the circuit pattern in the opening of the resist, the second plating resist is removed, and the exposed second non-electrolytic layer is removed. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006287034(A) 申请公布日期 2006.10.19
申请号 JP20050106252 申请日期 2005.04.01
申请人 SHINKO ELECTRIC IND CO LTD 发明人 OKAZAWA HIDEYASU;TAKEDA YOSHIKI
分类号 H05K3/18;C25D5/02;C25D7/00;H05K1/02;H05K3/24 主分类号 H05K3/18
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