发明名称 Phase locked loop
摘要 A phase locked loop includes a controlled oscillator for delivering an output signal at a determined output frequency, and a variable frequency divider for converting the output signal into a signal at divided frequency. The PLL is termed composite in that it includes at least one first loop having a loop filter for generating a first control signal for the oscillator on the basis of the signal at divided frequency, and a second loop having a loop filter, different from the loop filter of the first loop, for generating, on the basis of the signal at divided frequency, a second signal for additional control of the oscillator. The loop filter of the first loop and the loop filter of the second loop have different respective cutoff frequencies. The passband of the first loop, can be adapted to ensure the convergence and the stability of the PLL, while the second loop can afford extra passband increasing the speed of adaptation of the PLL in case of modification of the value of a preset for the output frequency.
申请公布号 US2006232344(A1) 申请公布日期 2006.10.19
申请号 US20060400062 申请日期 2006.04.07
申请人 BADETS FRANCK;BELOT DIDIER;LAGARESTE VINCENT;DEVAL YANN;MELCHIOR PIERRE;BEGUERET JEAN-BAPTISTE 发明人 BADETS FRANCK;BELOT DIDIER;LAGARESTE VINCENT;DEVAL YANN;MELCHIOR PIERRE;BEGUERET JEAN-BAPTISTE
分类号 H03L7/00 主分类号 H03L7/00
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