| 摘要 |
An embodiment of the present invention provides an apparatus, comprising a sensor node; the sensor node may be interfaced with a power save module (PSM) capable of decreasing the power consumption of the sensor node, wherein the power save module may include circuitry to accomplish the decrease in power consumption in the sensor node. The sensor node may further comprise a processor, radio modules, and additional application specific sensor and actuation modules. The processor, radio modules, and additional application specific sensor and actuation modules may be on either a single board or on separate boards communicating over a hardware interface. Further, the power save module may decrease the power consumption by incorporating a trigger circuit to wake up the sensor node and a cut off circuit to shut down the power to the sensor node. The power save module may further include a communication module to communicate with the sensor node, and interface lines to shut down and power up the power save module (PSM). The circuitry may implement in an extra 4-bit microcontroller. In operation when the sensor node needs to go into a sleep/shutdown mode it may switch on the PSM and send a message to the communication module of the PSM telling it when it needs to wake up and the PSM may then shut down the sensor node by cutting of the power to the node and starting a timer to keep track of when to wakeup the sensor node. |
