发明名称 Bonding pad for a packaged integrated circuit
摘要 An integrated circuit is packaged using a package substrate that has a bottom side with a regular array of connection points and a top side with the integrated circuit on it. Vias in the package substrate provide electrical connection between the top and bottom sides. The vias have a via capture pad to which a wire may be wire bonded so that the wires from the IC to the substrate top side directly contact the vias at their capture pads without the need for traces from a top side bond pad to a via. The via capture pad is shaped to include at least one sharp edge to improve the ability of a wirebonder with pattern recognition software to locate the capture pad and place the wire.
申请公布号 US2006231959(A1) 申请公布日期 2006.10.19
申请号 US20060377996 申请日期 2006.03.17
申请人 HARUN FUAIDA;KOH LIANG J;TAN LAN C 发明人 HARUN FUAIDA;KOH LIANG J.;TAN LAN C.
分类号 H01L23/48;H01L23/31;H01L23/498;H01L23/50;H01L23/544 主分类号 H01L23/48
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