Pattern layout of CMOS image sensor

摘要

A solid-state image pickup device comprises pixels and output circuits. The pixels are arranged two-dimensionally with a vertical and a horizontal, with pixels vertically adjacent to each other forming a pair. The output circuits are provided so as to extend from the spacing part of a pair of pixels vertically adjacent to each other to the spacing part of a pair of pixels horizontally adjacent to the pair of pixels. The output circuits are outputs information corresponding to the signal charge read from the selected one of the pair of pixels. A unit cell is composed of a pair of pixels vertically adjacent to each other and an output circuit corresponding to the pair of pixels. Such unit cells are arranged in a checkered pattern. One of the pair of pixels in a unit cell diagonally adjacent to the pair of pixels is arranged in the same horizontal line.