| 摘要 |
PROBLEM TO BE SOLVED: To flexibly and efficiently execute processing with reduced electric power consumption, in a device having a plurality of processors. SOLUTION: This information processor 1 is connected in series with processor cores provided with local memories via a shared memory of a dual port memory, and conducts an input and an output between the respective processor cores via the shared memory. A plurality of the processor cores are thereby accessed concurrently to the shared memory being an input source of each data, when inputting the data, and is accessed concurrently to the shared memory outputting the data, when outputting the data. Resultingly, the processing is flexibly and efficiently executed with the reduced electric power consumption, in the device having the plurality of processors. COPYRIGHT: (C)2007,JPO&INPIT
|
