发明名称 |
Contact plug processing and a contact plug |
摘要 |
A semiconductor device has anisotropically formed via holes through a PMD layer. The anisotropic geometry of the via holes results in the diameter of a via hole over a gate structure being equal to the diameter of a via hole not over the gate structure. The via holes are formed by depositing a silicon layer and an antireflective layer over the PMD layer. The silicon layer and the antireflective layer are etched to have holes with a regular taper. The holes through the PMD are anisotropically etched so as to have straight walls.
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申请公布号 |
US7122903(B2) |
申请公布日期 |
2006.10.17 |
申请号 |
US20030688873 |
申请日期 |
2003.10.21 |
申请人 |
SHARP KABUSHIKI KAISHA |
发明人 |
KANZAWA HIDEYUKI |
分类号 |
H01L21/3065;H01L29/40;H01L21/302;H01L21/311;H01L21/461;H01L21/768 |
主分类号 |
H01L21/3065 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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