Non-volatile semiconductor memory device

摘要

A plurality of memory cells are connected between two adjacent sub-bit lines. A row decoder 3 selects a word line connected to a memory cell to be read. A selection line selection circuit 2 and a column selection circuit 5 include first and second selection portions that perform selection operations simultaneously and independently. The first selection portion selects a first pair of main bit lines and selection lines in order to select the memory cell to be read. The second selection portion selects a second pair of main bit lines that is different from the first pair of main bit lines and selection lines for selecting a sector different from that for the memory cell to be read in order to select a line to be used for reading a reference voltage.