发明名称 Method and apparatus for multi-interrupt controller for reducing hardware interrupts to DSP
摘要 The present inventions provide a controlling device for reducing external interrupts for a processor and the method thereof in a real time system. The controlling device decides whether it should trigger a real interrupt to the processor or combining as many interrupts as possible in one interrupt. The controlling device comprises a buffer, an interrupt controller, and an interrupt recording table. The interrupt controller receives interrupts, then saving information of interrupts to the buffer and reading out limitations of the interrupts, the limitations including interrupt deadlines and processing time of each interrupt. The interrupt recording table stores the limitations of each interrupt. The interrupt controller comprises a timer for counting timing references of the interrupt signals. After receiving an interrupt, the interrupt controller compares the limitations and selectively sends an interrupt signal, a real hardware interrupt, to the processor.
申请公布号 US7124225(B2) 申请公布日期 2006.10.17
申请号 US20040885628 申请日期 2004.07.08
申请人 BENQ CORPORATION 发明人 YAO CHIN-SHU
分类号 G06F13/24;G06F3/00 主分类号 G06F13/24
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