| 摘要 |
A power factor correction (PFC) circuit ( 10 ) includes a pulse width modulator ( 31 ) operating in response to a clock signal (CLK) for switching a coil current (ICOIL) over a charging period (TCHG) to correct a power factor at a node ( 32 ). The coil current discharges over a discharging period (TDSCHG) to develop an output voltage (VOUT) at an output ( 30 ). An oscillator ( 35 ) generates the clock signal to have a clock period (TCLK) longer than the sum of the charging and discharging periods, thereby operating in a discontinuous mode, and has an input ( 39 ) for sensing the input signal to modify the clock period.
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