发明名称 Two step semiconductor manufacturing process for copper interconnects
摘要 An embodiment of the invention is a method of manufacturing copper interconnects 30 on a semiconductor wafer 10 where an electroplating process is used to deposit a first layer of copper grains 30 d having an initial grain size and a second layer of copper grains 30 e having a different initial grain size.
申请公布号 US7122466(B2) 申请公布日期 2006.10.17
申请号 US20030628198 申请日期 2003.07.28
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 PARK YOUNG-JOON;KRISHNAN SRIKANTH
分类号 H01L21/4763;C25D15/00;H01L21/288;H01L21/768;H01L23/532 主分类号 H01L21/4763
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