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发明名称
差分式延迟细胞元电路
摘要
本发明提出一种差分式延迟细胞元电路。此差分式延迟细胞元电路共包含两条各自并联一个电容器的讯号路径。两条讯号路径上电容器尺寸大小的差异决定了此差分次延迟细胞元的延迟解析度。此差分式延迟细胞元不需要倚赖逻辑闸增强输入讯号的驱动能力,并于讯号输入端采用解多工器电路,因此任一时间仅有单一讯号路径被驱动进而可节省功率消耗。
申请公布号
TW200637152
申请公布日期
2006.10.16
申请号
TW094110755
申请日期
2005.04.04
申请人
国立中正大学
发明人
王进贤
分类号
H03L7/06
主分类号
H03L7/06
代理机构
代理人
洪尧顺
主权项
地址
嘉义县民雄乡三兴村160号
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