发明名称 MEMORY HAVING CHARGE STORAGE NODE HAVING AT LEAST A PART POSITIONED IN TRENCH OF SEMICONDUCTOR SUBSTRATE AND ELECTRICALLY COUPLED WITH SOURCE/DRAIN REGIONS FORMED ON SUBSTRATE
摘要 <P>PROBLEM TO BE SOLVED: To provide an integrated circuit facilitating manufacture by a new technology of a memory with a storage electrode formed in a downsized trench. <P>SOLUTION: Blocking features for a plurality of trenches 124 in a memory array is patterned by using a mask forming a plurality of straight strips passing through each memory array in a line writing direction. The charge storage node has a projection 120.3 on a first side of a trench adjacent to source/drain regions, and also has an upper surface portion (T) adjacent to the projection along the side face. A trench sidewall covers an upper surface (T), and has a part (S) that is roughly straight in a second side 124.2. A dielectric film 144.1 in the trench sidewall has a thicker part in the second side than that in the first side. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006279006(A) 申请公布日期 2006.10.12
申请号 JP20050163077 申请日期 2005.06.02
申请人 PROMOS TECHNOLOGIES INC 发明人 SHO CHOKI;KAN EIGO
分类号 H01L21/8242;H01L21/8247;H01L27/108;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L21/8242
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