发明名称 COMPOUND SEMICONDUCTOR DEVICE AND ITS FABRICATION PROCESS
摘要 PROBLEM TO BE SOLVED: To avoid complication of fabrication process by forming all epitaxial layers through a single epitaxial growth step thereby eliminating the need for a large number of times of ion injection and anneal steps or a step for processing a semiconductor layer, e.g. for forming a base pedestal. SOLUTION: In the compound semiconductor device 100, the emitter layer 5a of a HBT and the channel layer 5b of an FET employ an identical n-type InGaP layer. The base layer of the HBT, i.e. a p+-type GaAs layer is utilized as the p-type buffer layer 4b of the FET. Consequently, pinch-off properties of the FET are improved and mutual inductance gm can be increased. Since epitaxial growth is required only once and ion implantation and anneal steps are not required, fabrication process can be simplified and wafer cost can be reduced. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006278541(A) 申请公布日期 2006.10.12
申请号 JP20050092871 申请日期 2005.03.28
申请人 SANYO ELECTRIC CO LTD 发明人 ASANO TETSUO
分类号 H01L21/8222;H01L21/28;H01L21/331;H01L21/8232;H01L21/8248;H01L27/06;H01L27/095;H01L29/417;H01L29/423;H01L29/49;H01L29/737 主分类号 H01L21/8222
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