| 摘要 |
PROBLEM TO BE SOLVED: To execute a plurality of instructions in a parallel processing manner out of order by avoiding the occurrence of a data error due to dependence. SOLUTION: This computer system includes an instruction fetch unit (106) and an execution unit (107) for executing an instruction out of order. The execution unit includes: a register file; a plurality of functional units; a first bus for transferring data from the register file to the plurality of functional units; a second bus for transferring data from the plurality of functional units to the register file; and a load store unit adapted so as to make a load request to a memory system for all instructions in an instruction window out of order and make a store request for all of the instructions in the instruction window in order. COPYRIGHT: (C)2007,JPO&INPIT
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