发明名称 Analog to digital converter e.g. pipeline converter, has concatenation device to concatenate total weighted correction value and doubled digital output value to provide corrected output value, and condenser unit have unit condensers
摘要 <p>The converter has converter stages, each with a correcting unit including a memory to store weighted correction values for each condenser unit of the stage. Another memory of the correcting unit stores a total weighted correction value for each digital converter output value. A shifting unit multiplies the digital value to obtain an ideal weighted digital converter output value. A concatenation device (4) concatenates the total weighted correction value and the doubled digital output value to provide a corrected output value. The condenser units have a preset number of unit condensers.</p>
申请公布号 DE102005015807(B3) 申请公布日期 2006.10.12
申请号 DE20051015807 申请日期 2005.04.06
申请人 INFINEON TECHNOLOGIES AG 发明人 BOGNER, PETER
分类号 H03M1/44;H03M1/10 主分类号 H03M1/44
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