Vertikaler Leistungs-MOSFET mit dicker Metallschicht zur Verminderung des verteilten Widerstandes und Verfahren zur Herstellung

摘要

The on-resistance of a vertical power transistor is substantially reduced by forming a thick metal layer on top of the relatively thin metal layer that is conventionally used to make contact with the individual transistor cells in the device. The thick metal layer is preferably plated electrolessly on the thin metal layer through an opening that is formed in the passivation layer.