| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a phase frequency detection circuit and PLL(phase lock loop) which can draw PLL in stable at high speed, not being influenced by scratch of a medium etc. and less susceptible to a modulation mark. <P>SOLUTION: A circuit which generates a reproduction clock signal based on a reproduction signal is constituted of; a voltage controlled oscillator which generates the above reproduction timing signal; a 1st cycle generator which generates a signal for the above prescribed cycle from the above reproduction clock; a 2nd cycle generator which is different from the 1st cycle generator in terms of phase and generates a signal of the above prescribed cycle from the above reproduction clock; a 1st multiplier which multiplies the above reproducing signal and the output of the above 1st cycle generator; a 2nd multiplier which multiplies the above reproducing signal and the output of the above 2nd cycle generator; and the PLL which controls control voltage of the above voltage controlled oscillator according to the output of the above 1st multiplier and output of the 2nd multiplier. <P>COPYRIGHT: (C)2007,JPO&INPIT |
