发明名称 |
Semiconductor device and semiconductor device manufacturing method |
摘要 |
A semiconductor technique is provided which can achieve both of lowered resistance in a logic formation region and reduced leakage current of the capacitor of a memory device. Source/drain regions ( 4 ) are formed in the upper surface of a semiconductor substrate ( 1 ) in a memory formation region and cobalt silicide films ( 9 ) are formed in the upper surfaces of the source/drain regions ( 4 ). Source/drain regions ( 54 ) are formed in the upper surface of the semiconductor substrate ( 1 ) in a logic formation region and cobalt silicide films ( 59 ) are formed in the upper surfaces of the source/drain regions ( 54 ). The cobalt silicide films ( 59 ) in the logic formation region are thicker than the cobalt silicide films ( 9 ) in the memory formation region.
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申请公布号 |
US2006226461(A1) |
申请公布日期 |
2006.10.12 |
申请号 |
US20060448712 |
申请日期 |
2006.06.08 |
申请人 |
RENESAS TECHNOLOGY CORP. |
发明人 |
SHINKAWATA HIROKI |
分类号 |
H01L21/28;H01L29/94;H01L21/02;H01L21/8239;H01L21/8242;H01L21/8244;H01L27/108 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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