发明名称 Flash memory cell having reduced floating gate to floating gate coupling
摘要 According to an embodiment of the invention, a flash memory cell includes a first gate stack and a second gate stack having a film deposited across the gap between the first and second gate stacks so that the film creates a void between the first and second gate stacks. Dielectric materials may be used to reduce conductivity between the two stacks. A dielectric material that is resistant to conductivity has a low dielectric constant (k). The lowest-k dielectric material is air, which has a dielectric constant of approximately 1. By creating a void between the two gate stacks, the least conductive material (air) is left filling the space between the gate stacks, and the likelihood of parasitic coupling of two adjacent floating gates is substantially reduced.
申请公布号 US2006228858(A1) 申请公布日期 2006.10.12
申请号 US20050095330 申请日期 2005.03.30
申请人 WOO BEEN-JON K;KIM YUDONG;FAZIO ALBERT 发明人 WOO BEEN-JON K.;KIM YUDONG;FAZIO ALBERT
分类号 H01L21/336 主分类号 H01L21/336
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